This invention relates generally to the fabrication of integrated circuits.
To increase performance of NMOS and PMOS deep sub-micron transistors in CMOS technology, current state-of-the-art technology uses compressive stress in the channel of the PMOS transistors, and tensile stress in the case of NMOS transistors. This is usually achieved by substrate induced strain which is a very expensive technology option and is also difficult to implement using a single substrate approach.